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I've returned to Dartmouth after a long career in the computer industry. Over the years I have specialized in custom VLSI circuits and modelling, computer architecture, operating systems and most recently embedded software.
Digital Design; Embedded Programming
- AB, Engineering Sciences, Dartmouth 1991
- MS, Engineering Sciences, Dartmouth 1993
- J. A. Kowaleski et al., "Implementation of an Alpha microprocessor in SOI," IEEE International Solid-State Circuits Conference, Digest of Technical Papers. ISSCC., 2003, pp. 248-491 vol.1, doi: 10.1109/ISSCC.2003.1234287.
- Power and CAD considerations for the 1.75mbyte, 1.2ghz L2 cache on the alpha 21364 CPU, Proceedings of the 12th ACM Great Lakes Symposium on VLSI 2002
- A. Jain et al., "A 1.2 GHz Alpha microprocessor with 44.8 GB/s chip pin bandwidth," IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177), 2001, pp. 240-241, doi: 10.1109/ISSCC.2001.912621.
- Staggered power-up and synchronized reset for a large ASIC or FPGA | 8,938,628