ENGS 194 Lab - MOSFET Fabrication

Fall Term, 1995

Lab group:

Rob McLennan
• Drew Nathanson
• Jinzhi Ni
• Tolu Ogunkeye>

Course Professor:

• Albert Henning

• Chris Levey

Objective:

To fabricate various semiconductor devices, including enhancement mode N-channel MOSFETS, using the Solid State Lab at Thayer School of Engineering. To familiarize ourselves with all aspects of semiconductor device fabrication, such as: oxidation, photolithography, wet etching, metal deposition, ion implantation and annealing.

Timeline

Week 1: Wafer clean and oxidation

1. Received eight (8) silicon wafers.
2. Performed RCA cleaning.
3. Wet thermal oxidation in Thermco atmospheric diffusion furnace.
   • Temperature: 1050C
   • Time: 3 1/2 hours
   • Expected oxide thickness: 1 micron

Week 2: Oxide measurement and Photomask #1

1. Predicted oxide thickness:
   • FLOOPS simulation Ð prediction: 1.5 microns
     • FLOOPS script file
     • Graphical output
   • Calculations using Deal-Grove model
     • Prediction: 1.06 µm
2. Measured thickness with optical ellipsometer
   • Average thickness: 8457 Angstroms (=0.85 µm)
   • Procedure and data
3. Exposed wafers to Photomask #1: MOAT isolation definition
   • Photolithography procedure
4. Etched wafers
   • Created etch solution at room temp: 5% HF, 95% NH4F
   • Immersed wafers in solution for 31 minutes (until beads were observed on back); over-etched additional 0.5 minutes
   • Rinsed for 3 minutes under distilled water spray
   • Dried wafers with nitrogen gas

Week 3: Thin gate oxidation and polysilicon deposition

Our group: Electron Beam Deposition of Polysilicon

1. Polysilicon deposition using Varian Electron Beam evaporator
   • Chamber was pre-pumped to vacuum before starting
   • Chamber vented and wafers were loaded
   • Chamber pumped to 1.5e-6 torr (final pressure: 6e-6 torr)
   • Used 23% power (100 mA) to generate an electron beam which evaporated the polysilicon source
   • Deposited polysilicon on wafers at a rate of 12 A/sec
   • Total amount of polysilicon deposited was 1µm

Week 4: Polysilicon oxidation and annealing; Photomask #2

Our group: Polysilicon oxidation and Photomask #2

1. Examined wafers:
   • Wafer B: (no comments)
   • Wafer D: polysilicon badly peeled; wafer unusable
   • Wafer E: some slight flaws; alignment looks good
   • Wafer 3: slight peeling of polysilicon
2. Oxidized polysilicon using rapid thermal annealer
   • Temperature: 1200 *C
   • Predicted growth: 70nm in 7 minutes
   • Time and actual oxide grown
     • Wafer B: 7 minutes -> 140 nm
     • Wafer E: 5 minutes -> 116 nm
     • Wafer 3: 5 minutes -> 95 nm
3. Exposed wafers to Photomask #2: Gate definition
   • Photolithography procedure
4. Etched polysilicon
   • Etch solution: 20:1 NH4:HF
   • Time: 30 minutes

Week 5: No lab

• Wafers sent out for ion implantation

Week 6: Implant activation and drive-in; Isolation Oxide; Photomask #3

Our group: Photomask #3: Contact definition

1. Exposed wafers to Photomask #3: Contact definition
   • NOTE: Exposure time: 12 seconds
   • Photolithography procedure

Week 7: Metal Deposition

1. Electron beam deposition of aluminum using Varian electron beam evaporator
   • Chamber was pre-pumped to vacuum before starting
   • Chamber was vented and wafers were loaded
   • Pressure was reduced to 3.4e-6 torr using the mechanical pump and then the diffusion pump
   • Wafer temperature set to 200 C (actual temperature: 203.5 C)
   • Used 59% power (350 mA) to generate an electron beam which evaporated the Al source
   • Deposited Al on wafers at a rate of 5 A/sec
   • Total amount of Al deposited: 0.75 µm
2. Alpha-step measurements made of polysilicon and aluminum thickness
   • Polysilicon thickness: 1 µm
   • Aluminum thickness: 0.8 µm

Week 8: Photomask #4: Metal definition; Forming gas anneal

Our group: Strip photoresist; Forming Gas Anneal

1. Observed etched isolation oxide
   • Wafer B: Acid attacking photoresist (overetched?); polysilicon is non-uniform in gate area of some devices
   • Wafer E: Bad cracking of photoresist - appears overetched
   • Wafer 3: Many large-scale device defects
2. Stripped photoresist
   • Rinsed wafers with acetone for 1 minute
   • Some colorized bits remained
     • Tried 2 rows of Wafer #3 in ACT - no visible improvement
3. Forming Gas Anneal
   • Temperature: 400 degrees C
   • Time: 30 minutes
   • Forming Gas: 8 L/min

Results

Unfortunately, the devices we made did not function. We determined that the Aluminum layer was overetched, so that contact is not made with the substrate.

• SEM Evaluation

• Electrical Measurements