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Paul Ferguson Jr.

Paul Ferguson

MediaTek Fellow, MediaTek Wireless, Woburn, Mass.
Adjunct Associate Professor of Engineering
paul.ferguson@mediatek.com

Education

  • A.B., Engineering Sciences, Dartmouth College 1984
  • M.S., Electrical Engineering, MIT 1986
  • Ph.D., Engineering, Oregon State University (candidate)

Research Interests

Mixed-signal and analog circuit and system design; signal processing; wireless systems; analog to digital and digital to analog conversion

Selected Publications

  • Delta-Sigma Data Converters: Theory, Design, and Simulation, edited by S.R. Norsworthy, R. Schreier, G.C. Temes, IEEE Press, Piscataway, NJ, 1997

  • A. Shabra, J. Gealow and P.F. Ferguson, Jr., "GSM DAC with new segmented mismatch shaping technique," CICC Proceedings, pp. 191-193, October 2004.

  • T. J. Barber, Jr., S. Ho and P.F. Ferguson, Jr., "Multi-mode CMOS low dropout voltage regulator for GSM handsets," VLSI Symposium Proceedings, pp. 284-287, June 2002.

  • P.F. Ferguson, Jr., X. Haurie and G.C. Temes "A highly linear low-power 10 bit DAC for GSM," CICC Proceedings, pp. 261-264, May 2000.

  • P.F. Ferguson, Jr., A. Ganesan, R.W. Adams, S. Vincelette, R. Libert, A. Volpe, D. Andreas, A. Charpentier, and J. D'Attorro, "An 18-bit 20kHz Dual Sigma-Delta A/D Converter," ISSCC PROC., WP4.4, February 1991.

Awards

  • Member, Sigma Xi Honor Society
  • Member, Phi Beta Kappa Honor Society
  • Olmstead Engineering Sciences Prize, Thayer School of Engineering (1984)

Selected Patents

  • Dual-mode delta-sigma analog to digital converter system and method. U.S. Patent No. 7,164,376 (2007)

  • Switched capacitor integrator system. U.S. Patent No. 7,138,848 (2006)

  • Method and apparatus for use in switched capacitor systems. U.S. Patent No. 6,917,321 (2005)

  • Multimode voltage regulator. U.S. Patent No. 6,897,715 (2005)

  • Offset calibration system. U.S. Patent No. 6,624,772 (2003)